Negative resistance diode building block for logic circuitry



Nov. 6, 1962 R. WALLACE, JR

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Filed Oct.8, 1959 8 Sheets-Sheet 1 lV'GAT/VE 25:15 ran/:5 0/005 n TYPE) 3GERMAN/UM FIG.

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V VOLTAGE FIG. 4

4 56/; T/l/E RES/J TAIVCE 0/005 FIG 5B INVENTOR By R. L. WALLACE, JR. THvJ A TTORNEV Nov. 6, 1962 R. L. WALLACE, JR 3,062,971

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Filed Oct.8, 1959 8 Sheets-Sheet 2 S U I D U I I I I I a 42 I I If I I I I I; I I

I v I I I T I I I I I I l I I I I I I I I V l I I I l l I I I I I 7,VOLTAGE INVENTOR R. L. WALLACE, JR.

ATTORNEY 3,062,971 NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGICCIRCUITRY Filed Oct. 8, 1959 Nov. 6 1962 R. WALLACE, JR

8 Sheets-Sheet 3 FIG. 70

FIG. 76'

Hw- 021w ATTORNEY Nov. 6, 1962 R. L. WALLACE, JR

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC .CIRCUITRY Filed Oct.8, 1959 8 Sheets-Sheet 4 FIG. 84

RL Z'a4r/v 53/37fl/VCE 0/005 41' I} If +.7/ I n l I TT I l I b l} Inn"1) I I H I T AI II III III I H: i I I0 i I H I l I ll 1 l l |(ll l l 5*lNl/ENTOR AL. WALLACE, JR.

yan- C.

ATTORNEY Nov. 6, 1962 R. 1.. WALLACE, JR

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Filed Oct.8, 1959 8 Sheejs-Sheet 5 IVEGAT/VE RES/STKNCE REGION m M a 0 L n i I 1 1M 9A 3 av Q Q. A 9 m F av e M A z ,w u v q ED C Q. a m m F F lNVENTOR ByRL. WALLACE, JR. -y c NwJ A TTORNEV Nov. 6, 1962 R. WALLACE, JR 3,06

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Filed Oct.8, 1959 8 Sheets-Sheet 6 FIG. /0 K:

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INPUT c our/=07 1 24 2-: RP: L-

lNVENTOR R./.. WALLACE, JR.

ATTORNEY v- 6, 1962 O R. WALLACE, JR 3,062,971

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Hw cw J" ATTORNEY Nov. 6, 1962 R. L. WALLACE, JR 3,062,971

NEGATIVE RESISTANCE DIODE BUILDING BLOCK FOR LOGIC CIRCUITRY Filed Oct.-8, 1959 8 Sheets-Sheet 8 FIG. /3 0/ I /8-/ L-l/ 22 [9-, NEGATIVE I 3eeszsrmvcs 0/005 I I I 2d l i I 2 I 23 -/9 -2 3/2 NEGA 77 V5 EEJ/Sramc!Dl0\0 --"-23 FIG. /4 i 6fl7"ll/E% ffJ/JTflA/C I 0/005 I I-Z4 INVENTORR.L. WALLACE, JR.

ATTORNEY Unite States te York Filed Oct. 8, 1959, Ser. No. 845,274 21Claims. (Cl. 307-885) This invention relates to a building block for awidespread variety of circuit configurations and has for its generalobject the simplification of circuit design.

A further object of the invention is to facilitate the construction ofultrahigh frequency devices by realizing the building block in the formof a compact integral unit. Such a unit allows ease of replacement andminimizes space and power requirements. It is advantageously employed inminiaturized digital apparatus such as computers.

A still further object is to increase the capability and utility ofbistable and gating circuits by the novel interconnection of two or morebuilding blocks.

The building block of the present invention is characterized by havingonly two external terminals between which are only three elements: anegative resistance, voltage-controlled crystal diode, an inductanceelement and a resistor. The diode which is the central element of thebuilding block has a current-voltage characteristic with three regions.In the first, which exhibits a positive resistance, an increase involtage from zero is accom panied by an increase in current until acurrent maximum is reached. Then the characteristic enters its negativeresistance portion so that a further increase in voltage is accompaniedby a decrease in current until a current minimum is reached. At thelatter point, the characteristic turns upward and thereafter, forfurther increase in the voltage, continuously displays a positiveresistance. While a single value of current may have multiple voltagesidentified with it, there is but one current for a specified voltage sothat the characteristic is said to be voltagecontrolled.

A typical and appropriate diode for the building block is composed oftwo semiconducting materials with a narrow junction between them.Impurities are added to dope the materials in such a way as to produce aunique voltage-controlled negative resistance characteristic. The theoryof the diode is more fully explained in a report of Leo Esaki in thePhysical Review, 1958, vol. 109, page 603. The narrow junction whichmakes possible the negative resistance at high frequencies hasassociated with it a relatively high capacitance. Nevertheless, the highfrequency limit of the diode is not solely a function of thecapacitance. It is dependent on the negative resistance-capacitanceproduct which may be controlled by proper doping. Switching speedsmanyfold higher than formerly possible with negative resistance devicesare now attainable.

The integral unit of the invention is produced by placing a negativeresistance diode of the Voltage-controlled type in parallel with theseries combination of an inductance element and a resistive element. Themagnitudes of the resistive and inductive elements depend upon theparticular use to which the block is put and are discussed in detailbelow in conjunction with the novel embodiments proposed.

For low frequency operation the building block is made up of lumpedcircuit elements. At ultrahigh frequencies it is a compo-site structure.In one type a resinous material is placed between two holders whichserve as a mount for a semiconductor diode. As the holders are broughtphysically close together, the resin is extruded from between them toform at their outer Patented Nov. 6, 1962 edges a disk-like solid ofrevolution. The series combination of distributed resistance andinductance results from depositing on the surface of the solid ofrevolution a resistive layer which encircles the holders at the level ofthe gap between them. The inductance may be altered by adjusting thegeometry of the surface, or by changing the composition of the resin. Itmay be made variable by including magnetically polarizable ferriteelements within the resinous solids formed.

The manner in which the invention accomplishes the above-mentionedobjects can be more clearly apprehended from a consideration of thedescriptions of a few preferred embodiments which are to be consideredin conjunction with the drawings, in which:

FIG. 1 is a diagram of a typical negative resistance, voltage-controlleddiode which is a central constituent of the present invention;

FIG. 2 is a set of curves portraying actual and idealizedcharacteristics for the diode of FIG. 1;

FIG. 3 is an equivalent circuit diagram for explaining the operation ofthe diode of FIG. 1;

FIG. 4 is a schematic circuit diagram of the building block of theinvention;

FIG. 5a is an idealized equivalent circuit diagram for the buildingblock operated in its negative resistance condition;

FIG. 5b is an idealized equivalent circuit diagram for the buildingblock operated in its positive resistance condition;

FIG. 6 is a set of curves illustrating the way in which the directcurrent characteristics of the building block are affected by changes inpadding resistor magnitude;

FIG. 7a is a complex frequency domain for the building block operated inits negative resistance condition and is used in explaining thefunctioning of the invention;

FIG. 7b is the time domain corresponding to the complex frequency domainof FIG. 7a;

FIG. 7c is a complex frequency domain for the building block operated inits positive resistance condition and is used in explaining thefunctioning of the invention;

FIG. 7d is the time domain corresponding to the complex frequency domainof FIG. 7c;

FIG. 8a is a symbolic representation of a circuit embodying theinvention, e.g., a bistable circuit or an AND gate;

FIG. 8b is a characteristic curve for the bistable or AND gate circuitof FIG. 8a.;

FIG. 9a is a set of curves demonstrating the effect on pole location inthe complex frequency domain of changes in inductance when the AND gatecircuit of FIG. 8a is operated in its negative resistance condition;

FIG. 9b is a set of curves demonstrating the effect on pole location inthe complex frequency domain for changes in inductance when the AND gatecircuit of FIG. 8a is operated in its positive resistance condition;

FIG. 96 is a time response curve of the AND gate of FIG. 8a for typicalparameters;

FIG. 10 is a symbolic representation of a circuit comprising a chain oftwo driving building blocks, each separately interconnected with adriven building block by a coupling impedance;

FIG. 11 is a schematic diagram of a bistable circuit formed by seriallyconnecting two building blocks of the invention;

FIG. 12a is a composite characteristic curve for two serial-1y connectedbuilding blocks illustrating the operation of the circuit of FIG. 11;

FIGS. 12b and are characteristic curves for individual building blocksconstituting the bistable circuit of FIG. 11;

FIG. 13 is a cross sectional view of a microwave embodiment of thebuilding block of FIG. 4; and

FIG. 14 is a cross sectional view of a microwave embodiment of thebistable circuit of FIG. 11.

The invention may be best understood by beginning with a considerationof the voltage-controlled negative resistance diode around which thebuilding block is formed.

The illustrative diode 3 of FIG. 1 is biased in its forward direction bya battery 4, connected across terminals 1 and 2, so that a wafer 5 ofn-type germanium semiconductor is at a negative potential with respectto a mesa 6 of deposited metal. In the alloying process used to createthe special characteristics of the diode a narrow p-n junction 7 isformed between the mesa 6 and the body 5 of the wafer. The battery 4which supplies the voltage bias may be varied to obtain thecharacteristic curves of FIG. 2.

Referring to FIG. 2, there are two components constituting the currentflowing in the forward direction. The first component, a of FIG. 2, isjointly attributable in part to the high field intensity associated withnarrow p-n junctions and the high concentration of diode impurity atoms.It is produced by the seemingly anomalous penetration of the high energybarrier at the junction by lower energy carriers. Quantum mechanicsteaches that there is always a calculable probability of finding suchbehavior within a restricted voltage interval. The narrower the diodejunction, and the greater its impurity concentration, the higher is theprobability of barrier penetration. Quantum mechanical phenomena aresmall scale,

and there is a low critical voltage V (the symbol is chosen to indicatethe presence of a peak in the current-voltage characteristic) beyondwhich this current component decreases with an increase in voltage sothat there is a negative resistance between V and a voltage minimum V.Quantum mechanical operations take place at the maximum rate predictedby the theory of relativity, and are not limited by the slow transittimes of conventional charge carriers. Now possible are devices whichfunction in a fraction of the time formerly required for switching. Thesecond component b begins to have an appreciable magnitude where thequantum mechanical current becomes negligible. It is of the typicalinjection variety and has an exponentially increasing curve. It issubject to transit time restrictions. Summation of the currents a and bgives a composite current 0 whose idealized N-shaped characteristicstarts at the currentvoltage origin V I reaches a maximum V, I, turnsdownward to a minimum V, I and thereafter rises continuously withincreasing voltage. The magnitude of the positive resistance betweenpoints V I and V, I: is the reciprocal of the slope of the line segmentbetween them. Other resistive magnitudes are similarly calculated. Theshape of the N and the points of maximum and minimum current may beadjusted by controlled doping of the diode materials.

The idealized characteristic 0 allows constructing the equivalentcircuit of FIG. 3 for piece-wise linear analysis. Between break pointswhere the slope of the characteristic c in FIG. 2 abruptly changes,linear equations apply. Switches 8-1, 8-2 and 83, respectively, controlpositive resistor R positive resistor R 2, and negative resistor R. Inaddition the condenser C represents the selfcapacitance of the diode 3in FIG. 1 to account for the A.-C. behavior of the diode in contrastwith its D.-C. behavior. If the strength of the current source 4 betweenterminals 1 and 2 of diode 3 in FIG. 1 is gradually increased from zero,the locus of operation in FIG. 2 begins at V and follows a portion ofthe closed path d until V is reached, always remaining on the D.-C.operating curve. At 'V a slight increase in current requires atransition in voltage from V to V Empirically, it is known that thetransition does not occur instantaneously as it would in a purelyresistive circuit, rather a finite time interval is required duringwhich capacitor where I,=the difference between current of thecharacteristic 0 and that of locus d,

31K =the rate of change of voltage with respect to time,

(a and C=eapaeitance of the condenser. It is apparent that the voltagechanges at its maximum rate at V.

More common than the gradual increase in current along locus d in FIG. 2is the abrupt change in driving current from I to I occasioned by apulse or unit step. The locus of operation follows path e of FIG. 2.Initially, the entire current flows into condenser C causing it tocharge rapidly. Thereafter C charges at a decreasing rate, becoming zeroat V. The remainder of the operation parallels that previouslydescribed. Should the driving current he suddenly removed, or the pulsehave terminated at V I drops to I and C discharges until V is reached.

The building block which lies at the root of the present invention isconstructed as shown in FIG. 4. Diode 3 of FIG. 1 is shunted across itsterminals 1 and 2 by the series combination of a padding resistor R andan inductor L.

If the magnitude of R in FIG. 3 equals that of R only two equivalentcircuits are needed to completely describe the operation of an idealizedbuilding block. When the building block is operated in its negativeresistance condition, FIG. 5a is pertinent. The characteristic impedance2,, appears between terminals 1 and 2 of FIG. 4, and may be written:

C=magnitude of the diode capacitance, R=magnitude of the diode negativeresistance, R =magnitude of padding resistor, L=magnitude of inductance,

and s=o'+jw refers to the complex frequency variable. For the buildingblock operated with its positive resist- 'ance conditions assumedidentical, resistance R is substituted for R and R in FIG. 3, and theequivalent circuit of FIG. 5b applies. It differs from FIG. 5a by thesubstitution of R for R. The impedance Z between terminals 1 and 2 ofFIG. 4 becomes:

s R FTC 4 nected in shunt with diode 3 of FIG. 4 the steady voltageappearing at its terminals must always equal that of the diode.Consequently, a composite direct current charac teristic for thebuilding block of FIG. 4 may be obtained by adding the currents throughresistor R and the diode resistor for any given value of voltage.Resultant characteristics for three magnitudes of R are plotted in FIG.6. When the magnitude of R is less than that of -R, the compositecharacteristic 7 nowhere exhibits negative resistance. When themagnitude of R is equal to the magnitude of -R, as in curve g, thenegative resistance region is replaced by a straight line segmentparallel with the voltage axis. Theoretically, the transition from lowvoltage point V to high voltage point V could be made with a signalapproaching Zero magnitude, but the time for switching would not beoptimal. Resistor R must be sufficiently large to preserve enoughcomposite negative resistance to give fast switching but itsimultaneously must be small enough to allow a change of state with amoderate driving pulse. A satisfactory compromise is depicted in curveIt for which the magnitude of R is given by |R |=4/3lR]. This lattercurve may be used to illustrate switching along a locus h when thequiescent building block current is I A driving pulse, I I would exceedf1 by an incremental current AI, and the locus of changes would besimilar to that already described in conjunction with FIG. 2. Startingat quiescent voltage V the condenser C begins to charge until V isreached and only the incremental current AI is flowing through C.Thereafter, the voltage continues to increase along locus h to terminalvoltage V where all of the current divides between diode positiveresistor R and building block padding resistor R and C is fully charged.

The information obtainable from FIG. 6 is primarily limited to thedirect current effect of padding resistor R on the building block ofFIG. 4. For the influence of inductor L on the rate at which changes ofvoltage state take place, reference must be made to the separate domainsof FIGS. 7a through 7d dealing with the operation of the building blockin its conditions of positive and nega tive resistance. In the formercondition, so-called poles, designated by x's in the complex frequencydomain of FIG. 7a, are determined from the roots of Equation 2. Theroots are in the form:

and other symbols are as for Equation 2. Since the mag nitude ofresistor R will always be greater than that of diode resistor -R, 3 inEquation 6 will always be negative so that:

where [,8] is the magnitude of in Equation 6. Consequently, there willalways be two abscissa positions for each set of circuit parameters. Theextreme variation resulting from a change in industance L is shown inFIG. 70:. On the one hand, for zero industance the poles are k and k.With increasing industance, k moves in the direction of increasing 0until it reaches the limiting value m where the industance is infinite.Simultaneously, k moves to m. The corresponding response to an appliedunit step of current is indicated in the time domain of FIG. 7b. Forzero inductance pole k produces a decaying exponential k with exponent(a+a which is summed with the increasing exponential of k with exponent(a-i-a' yielding k-i-k" after subtraction of the unit step in keepingwith the requirement of zero response at the beginning of the excitationperiod. A marked improvement in rise time is apparent in curve mr-l-m'for pole locations m and m.

When the building block is operated in its positive resistancecondition, the roots of Equation 3 give pole locations which must alwayslie in the left half of the complex frequency domain in FIG. 70. Theroots are in the form:

'o+i '='o 1'\ fl' 'o where 0' and [3' are the same as for a and p exceptfor the replacement of R by R As inductance L increases, 0' becomessmaller along with far as demonstrated by the shift from positions 0 and0 to p and p, the time response for the latter being given by p+p' inthe time domain of FIG. 7 d. Further increase in L causes the poles tocoalesce at q where B'=a" A still further increase in L produces amigration of split poles in opposite directions along the a-axis untilthe limiting positions r and r are reached for infinite inductance. Thecorresponding response to a unit step of current is r-I-r in FIG. 7d.

The effect of inductance on switching speed is best demonstrated inconjunction with a single building block which performs logic functions.FIG. 8a illustrates a building block connected to serve as an AND gateor as a bistable network, depending on parameter selection. For ANDgating a summation of input current pulses greater than a predeterminedmaximum causes the output voltage of the gate to suddenly change from alow to a high magnitude.

In FIG. 8a four distinct leads, 12, 13, 14 and 15, are connected toterminal 1 of building block 11. Terminal 12 allows the application of abiasing current I from a voltage source V through a resistor R of largemagnitude. Terminals 13 and 14 are similarly connected to pulsingsources of current I and I respectively. Output voltage V: is measuredat terminal 15 across a large resistor R preferably of infiniteresistance as would be provided by the input terminals of an isolationamplifier. The magnitude of the biasing source I is selected to placethe operation of the AND gate at a low voltage operating point V shownat an abrupt change accounting for any increased curvature in the slopeof the positive resistance characteristic of FIG. 8b. Current sources Iand I are chosen so that when both are activated the total AND gatecurrent will exceed I and allow a switching transition to the outputvoltage Vf- When the activating pulses I and l terminate, the buildingblock returns to its stable equilibrium at voltage V If only currentsource I is activated the building block will be driven to the point V l-l-l on the characteristic of FIG. 8b, the voltage being not muchgreater than V the condition for no input signal. The characteristic foran AND gate should preferably be chosen to have a steep slope between VI and V, I.

With slight modifications the configuration of FIG. 8a demonstratesbistability if the activating current 1,, is reduced to zero and biascurrent I is gradually raised to I giving the quiescent output voltageV' at terminal 15. A driving current pulse of Y brings about a change ofvoltage state to V where it remains even after reduction of current I'to zero. In similar fashion a negative pulse I' causes a restoration ofthe original equilibrium voltage V' By making changes in the magnitudeof R circuits of varying states of stability may be produced accordingto well-known techniques.

As has been suggested by the domain diagrams of FIGS. 7a-7d the rapidityof switching of the AND gate or bistable circuit of FIG. 8a iscontrolled by pole positions which depend on the magnitude of inductorL. When the building block is operated in its negative resistancecondition, governed by Equation 7, curve m in FIG.

'7 9a for positive poles given by '=0'0|OL and curve n for negativepoles given by 0:0 -04 indicate a pole nitude of the inductor L is madelarger. The rate of improvement in switching speed, being related to ismost rapid in the interval:

L L =CR R where symbols are as for Equation 2 and L is the inductivemagnitude for which 0 :0. For the limiting value L the second derivativeof the reciprocal of switching speed with respect to inductance issubstantially zero. Beyond L curves u; and n of FIG. 9a asymptoticallyapproach a limiting value. By contrast in FIG. 912, for the buildingblock in its positive resistance condition, there are two sets ofnegative poles in the interval:

where L equals the inductance for which 5:6 In the remainder of thegraph there is a single pole with negative component 0 of locus waccompanied by an imaginary component jw whose locus z is shown dotted.Evidently, there is little gain in choosing an inductive magnitude forthe building block much greater than that of inductance L the secondderivative of the reciprocal of switching changes. Furthermore, largeinductance is often accompanied by resistance effects making forditficulty in maintaining an optimal padding resistance R For magnitudesof inductance smaller than L the decaying transient of the positiveresistance region has oscillatory behavior giving a voltage overshootduring switching. Nevertheless, the overshoot is often not troublesomefor moderate magnitudes of L, since pole locations near the --a-axis, asat p and p of FIG. 70, indicate low frequency.

Another factor in the transient buildup is the size of the currentpulse. It is a multiplicative coeflicient of the exponential termsmaking up the solution. By way of illustration, the transient responsefor a building block constructed from typical parameters is given inFIG. 90. The magnitude of L has been taken by reference to FIGS. 9:: and9b as /2L or in a representative case 2(10 henries. Other parameters areR0 =1 Ohm R=-3 ohms l0 (7 farads and R =4 ohms For the purpose ofdetermining the switching pattern of FIG. 90 the current of the buildingblock in FIG. 8a will be assumed just below I in FIG. 812 when aswitching pulse of AI is applied at t=0. When AI=1 milliampere, theswitching voltage begins at V in FIG. 9c and proceeds through thenegative resistance region until it reaches V at t after 0.9millimicrosecond. Had AI been as great as 10 milliamperes the elapsedtime would have been reduced to 0.3 millimicrosecond. The kind of risingtransient involved may be understood by reference to t-l-t' of FIG. 7bwhich is the response for the pole location of the present example. At Vthe building block enters its positive resistance condition so that polelocations p and p of FIG. 70 apply, with time response The utility ofthe single AND gate of FIG. 8a may be extended by having other AND gatesserve as current sources I and I This is illustrated in FIG. 10 where aportion of an AND gate chain has been formed by separatelyinterconnecting driving building blocks 11-2 and 11-3 with a drivenbuilding block 11-1 through coupling networks 16-2 and 163. The drivenbuilding block 11-1 is recognizable as the AND gate of FIG. 8a whosemode of operation has already been discussed. The chain may be extendedindefinitely by supplying each driving block at its input Currentterminals with supplementary driving blocks.

If the coupling network is chosen to be only the coupling resistor R,,,rapid switching is assured if there is a composite negative resistance Rat terminals 1-2 and 1-3. Assuming that neither driving building blockappreciably loads the other, this requires:

Equation 11 is derived by calculating the total current through adriving building block and R in terms of the input voltage V.

Should the driving building blocks interact with each other, a secondcondition accounts for the presence of two coupling impedances feedingthe driven building block:

where all symbols are as for Equation 11.

Furthermore, if the drives are through voltage sources a compositenegative resistance at the input terminals of the driving buildingblocks is preserved provided:

where R'=magnitude of composite negative resistance at terminal 1-2 or1-3, and

R R R =internal resistance of voltage sources V V V respectively.

To minimize the restrictions on parameters imposed by the resistor R anisolating intermediate amplifier A or a coupling inductor L may bechosen as the only element of the coupling network in FIG. 10. Anamplifier suitable for rapid switching, such as a maser or similarmicrowave device, prevents undesirable interaction of the buildingblocks and allows each driving unit to activate a multiple of drivenones. A coupling inductor also avoids direct current loading, though itis accompanied by a time delay in the appearance of an output voltageacross driven Q building blocks, thus giving the AND gate chain theeffect of a delay line.

The versatility of the building blocks may be further demonstrated byconnecting a multiple number of them serially to produce a multistablecircuit. When only two of them are placed in series the result is thebistable circuit of FIG. 11. In contrast with the earlier bistablecircuit of FIG. 8a, pulses in one direction only can effect aninterchange of building block voltage states at the close of a switchinginterval. The biasing resistor R taken in combination with battery E, isappropriately adjusted to place the operating steady state in the middleof a composite characteristic according to techniques discussed below.Capacitor C serves to bypass battery E for high frequency currents andhelps maintain constant potential at the battery terminals. It isimportant that the source of driving pulses be placed directly acrossthe serial combination of the building blocks in order to minimize powerrequirements. The constituents of the individual building blocks areselected in accord with requirements previously presented. In block 11-1current I flows through diode D I is the current in the shunt branchcontaining L and R I flows in diode D while current I is in the shuntbranch containing L and R 1 is furnished by battery E, and the pulsecurrent has an amplitude I Restrictions on the selection of auxiliaryparameters and the mode of switching operation are demonstrated in FIGS.12a-12c for the special case when both building blocks are identical.FIG. 12a shows the composite characteristic of two building blocks whoseindividual characteristics are represented respectively by FIG. 12b forblock 111 and FIG. 12c for block 11-2. Since the two blocks are inserial connection the same current must flow through both and thecomposite characteristic is obtained by summing the voltages produced bya given current. Region aa of the composite characteristic applies whenboth blocks are in a low voltage state. By contrast region bb isapplicable when both blocks are in a high voltage state. The narrowregion cc extending between I and I is operative when one block is inits high voltage state and the other is in its low voltage state. If thebuilding blocks were other than identical, there would be more than oneregion such as cc. To be bistable the circuit of FIG. 12a must have itsload line dd adjusted to intersect segment cc. Once a given biasingvoltage E has been selected R is lestricted to the sector cc and itsmagnitude is given by the reciprocal of the slope of the line chosen. Ofcourse, E may be shifted along axis V. An increase reduces the powerrequirements of the battery but simuq taneously limits the possiblevalues of R On the other hand, a decrease in the strength of E,increases the power requirements. By way of example, E, and R have beenchosen at intermediate positions. In the steady state the total currentflowing through both of the building blocks is equal to I given by theintersection of segment cc and load line dd at voltage V +Vsuperficially, it would appear that the voltages of the two buildingblocks should be equal, but the load line R intersects the compositecharacteristic in its negative resistance region. There will be voltagefluctuations until the individual building blocks have reached positionsof stable equilibrium in their positive resistance regions. For the loadline selected this I 10 i m At V it is I For building block 11-2, whosevoltage state is shown in FIG. 12c, 1,, places the equilibrium voltageat V at the beginning of the switching period t The current through Requals I The mechanism of switching is best understood from aconsideration of loci ff and gg in FIG. 12a. When a negative switchingpulse L, is applied the voltage of the circuit must remain momentarilyconstant because of the intrinsic capacitance associated with each ofthe building blocks and the presence of inductor L. If the pulse has aperfectly vertical leading edge, the current through the building blocksmust change instantaneously by dropping to point hh on locus ff.Thereafter, there is a transition along a segment of constant currentuntil both building blocks are in their low voltage state at kk if theapplied pulse is of suificient duration. When the ideal pulse isremoved, the intrinsic capacitances of both build ing blocks prevent aninstantaneous change in voltage and the building block current tends toincrease along a segmet of constant voltage until it meets load line ddat mm. The locus then moves along the load line until it intersects thecomposite characteristic where equilibrium in re-established. Inpractice the driving pulse departs from ideal and the inductors L and Lprevent instantaneous changes in the currents flowing through them, withthe result that the actual locus during the switching cycle more nearlyresembles gg. The time sequence is approximated on the loci at fivepoints, t through t Corresponding points are indicated on the switchingpatterns in FIGS. 12b and for the individual building blocks. Ideal lociare designated ff-1 and ;ff2 and the actual loci are marked gg-l andgg2. The building block inductors play important parts in controllingthe change of state during switching. When both diodes have been drivento their low voltage state at kk the current in L is greater than thatin L because it was initially greater and the tendency of an inductor isto maintain its current flow unchanged. At the moment of switching t thecurrent 'I through L was very much larger than I through L At time tjust before removal of the switching pulse, the current l through diodeD must be greater than I through diode D but the voltages across bothdiodes will be nearly equal only if the circulating current from thedischarge of the diode intrinsic capacitor is greater in D than in DWhen the switching pulse is removed circuit equilibrium requires arestoration of the steady state current 1 Both diode intrinsiccapacitors are able to accommodate instantaneous changes of current, butthe net flow in the capacitor of D must be greater than in the capacitorof D since the same current must flow through both building blocks andthe currents in the inductive branches resist change. As a result and asshown by Equation 1, the rate of voltage change as measured by themagnitude of current flowing in each diode intrinsic capacitor isintially greater in building block 111 than in building block 11-2, sothat the former rapidly makes the transition to the high voltage stateand constrains the latter to a low voltage equilibrium, therebcompleting the switching cycle.

To realize its full potential for rapid switching, the building block ofFIG. 4 must be able to function as a microwave circuit component. As iswellknown, distributed parameters become the high frequency counterpartof the lumped elements which define circuit behavior at low frequencies,and special precautions must be taken to prevent unwanted impedanceeffects. In the representative high frequency embodiment 11 of FIG. 13diode 3 is positioned between two holders 19-1 and 19-2 which act asterminals 1 and 2 of the building block. The diode is mounted at thebase of metal pin 18-1 and the combination is inserted into a channel inthe holder 19-1 until the diode mesa is in touching contact with a dia-1 1 phragm 20 at the apex of a pin 18-2 inserted into a similar channelin the holder 192. This arrangement assures a point contact between thediaphragm and the diode. To make the inductance between the terminalsand the diode negligible, the holders must be placed physically as closetogether as possible, being separated only by a thin dielectric film.This simultaneously increases the capacitance across the diode but notsignificantly compared with its intrinsic magnitude. Other techniquesfor minimizing holder inductance are considered in a co-pendingapplication, Dacey-Wallace, Serial No. 855,426, filed November 25, 1959.The thin film is provided by an epoxy resin chosen with a high enoughviscosity that it retains its cohesiveness. In the representative modelconstructed and tested a. resin manufactured and sold under the nameBondmaster M620" was used.

As the holders are pressed together the resin is extruded from the gapbetween them at their outer periphery and expands into a toroidal solidof revolution which may be made as large as needed for a specificstructure. It may be dissymmetrically machined to various geometries andthe resin itself may have materials added to alter the electricalcharacteristics of the circuit. Since the toroidal surface spans fromone holder to another a resistive coating deposited on it will bedirectly across the terminals of the building block. Each incrementalarc of the coating provides part of the path for an inductivecirculating current which is impeded by the resistive nature of thecoating. The incremental inductance and resistance may be summed overthe entire surface to produce the same effect at microwave frequenciesthat the series combination of an inductor and resistor has at lowfrequencies. It is also possible to produce a variable inductance, forexample, by inserting a ferrite slab within the toroid and subjecting itto a variable magnetic bias field.

The high frequency embodiment of the building block is usable in a widevariety of circuits. Typical is the bistable circuit of FIG. 11 whosemicrowave embodiment is presented in FIG. 14 and Whose mode of operationhas been discussed previously.

In the coaxial section of FIG. 14 a short-circuit termination 23 capsone end of a cylindrical outer conductor 24. Two building blocks 11-1and 112 are placed in series combination by being stacked one on top ofthe other and are interposed between the shortcircuit termination 23 anda center conducting coaxial segment 25 of a coaxial section. Asdepicted, each building block differs from the prototype of FIG. 13 inhaving a toroid of rectangular, instead of elliptical, cross section.This permits a reduced diameter for the outer coaxial conductor 24. Forsimplicity in construction the combined building blocks may bemanufactured as a single unit. To provide the equilibrium bias whichplaces one building block in its low voltage state and the other in itshigh voltage state, a battery E is connected across the terminals of thefeeder coaxial line 26. The inner conductor of the feeder abuts anannular resistive disk 27 which serves as bias resistor R The disk isco-extensive with the surface of inner conductor 25 and provides adirect current link with battery E through both building blocks.Dielectric disk 28 extends between the inner and outer conductors of thefeed line, and being a high frequency by-pass condenser C its axialdimension is dependent on the wall thickness of outer coaxial conductor23. At its open end the coaxial section is tapered to provide animpedance match with a source of pulsing current I which causes aninterchange between the voltage states of the two building blocks afterinput pulses are applied and terminated. Adjustments, such as in thetaper, may be made to offset the discontinuity effects occasioned by thepresence of the annular resistive disk 27. The change in voltage stateproduced by current pulses L, is monitored across an output coaxial line29 whose center conductor joins the serially combined building blocksbetween their toroidal surfaces.

The configuration of FIG. 14 assures input pulsing, direct current biasand the availability of output directly across the diode building block11-1 with minimum circuit complexity.

What is claimed is:

1. An electronic threshold switch, responsive to signals from anexcitation source and a biasing source, which comprises a first terminaland a second terminal, a first branch extending between said terminalsand containing a diode having a current-voltage characteristicmanifesting a region of negative resistance between first and secondregions of positive resistance, a first threshold between the firstregion of positive resistance and said region of negative resistance,and a second threshold between said region of negative resistance andthe second region of positive resistance, said diode being set by abiasing signal for bistable operation in two alternative states ofstable equilibrium, whereby an excitation signal carrying the operationof said diode beyond one of the thresholds initiates a transition fromone state to another, and control means extending between saidterminals, said control means comprising a padding resistor connected inshunt with said diode and proportioned to have a maximum resistivemagnitude greater than the minimum resistive magnitude of said negativeresistance for controlling the relative displacement of said firstthreshold from said second threshold to regulate the magnitude of saidexcitation signal which effects said transition, said padding resistorunavoidably operating, by itself, to cause a reduction in the speed ofsaid transition, and reactive means connected in shunt with said diodeand proportioned to offset said reduction.

2. A two-terminal switching network as defined in claim 1, adapted foremployment at microwave frequencies, wherein said diode comprises acrystalline wafer in contact with opposed surfaces of the terminals,said surfaces being in close proximity to each other, and means forconfining the resistive and reactive effects of said control means tothe region between said surfaces.

3. A logic circuit comprising the network of claim I, a source of biascurrent and a plurality of variable current sources connected in shuntwith said network, each of said sources comprising the seriescombination of a resistor of large magnitude and a voltage source, saidbias current source being proportioned to place said network in stableequilibrium at a low voltage operating point, said several variablecurrent sources being so proportioned that only the simultaneouspresence of all of the plurality exceeds a threshold current therebycausing a rapid transition of said network from a low voltage state to ahigh voltage state, and means for detecting said transition.

4. The logic circuit of claim 3 in which the inductance of saidtwo-terminal network is of a prescribed magnitude greater than thatsatisfying the following equation:

1 1 R 2 2 E 4(R,c L

R =positive resistance for building block diode, R =magnitude of paddingresistor, L=inductive magnitude of reactive means, and C=magnitude ofthe diode capacitance,

thereby to assure a nonoscillatory overshoot accompanying said rapidvoltage transition.

5. The logic circuit of claim 3 wherein said inductive means comprisesan inductor so proportioned that its inductance L is dependent upon thediode capacitance C, padding resistance R and negative resistancemagnitude R in substantial accordance with the formula:

13 L=CRPR whereby the second derivative of the reciprocal of switchingspeed with respect to inductance is substantially zero so that anincrease in said switching speed from an increase in said inductancebeyond said limit is offset by a decrease in said switching speed froman increase in said padding resistance.

6. A circuit to perform logic functions comprising a plurality ofdriving components each having a network as defined in claim 1 inparallel with at least two sources of driving current, at least onedriven component having a network as defined in claim 1, means forsupplying bias currents to all of said components, and coupling meansinterconnecting each one of said driving components with said drivencomponent whereby changes of voltage states of said driving componentscause like changes of voltage state in said driven component.

7. Apparatus as defined in claim 6 wherein said coupling means comprisesa series resistor R of predetermined magnitude whereby a compositenegative resistance is presented at the input terminals at any one ofsaid components.

8. Apparatus as defined in claim 6 wherein said coupling means comprisesa resistor R proportioned to satisfy the relation:

whereby rapid switching is assured when no driving component is loadedby anyother,

where R=magnitude of the diode negative resistance, R =positiveresistance for building block diode, and R =magnitude of paddingresistor.

9. Apparatus as defined in claim 6 wherein said coupling means comprisesa resistor R proportioned to satisfy the relation:

R. 2( R where R and R are, respectively, the magnitude of the diodenegative resistance and the magnitude of the padding resistance therebyto assure rapid switching despite the loading of any one drivingcomponent by any other.

10. Apparatus as defined in claim 6 wherein said coupling meanscomprises an isolation amplifier.

11. Apparatus as defined in claim 6 wherein the driving current sourceof each of said driving components comprises a voltage source connectedin series with a resistor of magnitude R proportioned according to therelationship:

where R=magnitude of the composite negative resistance presented at theterminals of each of said driving components as loaded by every otherone of said com ponents.

12. A bistable switching circuit comprising a first branch wherein firstand second networks as defined in claim 1 are connected in series witheach other thereby having the same current flowing through both toproduce a composite characteristic with a first region of positiveresistance in which both of said networks are in a low voltage state, asecond region of positive resistance in which both of said networks arein a high voltage state and a third region therebetween extendingbetween a current minimum and a current maximum in which one of saidnetworks is in a low voltage state and the other is in a high voltagestate; a second branch, in shunt with said first branch wherein abiasing resistor is connected in series with a source of bias voltagethereby causing said bistable circuit to be in equilibrium in said thirdregion whereby said first network is in a high voltage state and saidsecond network is in a low voltage state; and a third branch, in shuntwith said first branch, having pulsing means for momentarily reducingsaid current in said first branch whereby said first network is drivento its low voltage state for which its inductive current exceeds that ofsaid second network thereby causing, on deactivation of said pulsingmeans, the rate of change of voltage in said second network to exceedthat of said first network so that said networks must interchange theirvoltage states.

13. Apparatus as defined in claim 12 wherein the magnitude of saidresistor is equal to the reciprocal of the line segment on saidcomposite characteristic originating at the voltage of said bias andintersecting said third region within extremities delimited by saidcurrent maximum and said current minimum.

14. A switching network comprising a first terminal, a second terminal,a first branch extending between said terminals and containing only acrystal diode having a voltage-controlled region of negative resistanceR between first and second regions of positive resistance R and R acurrent maximum between said first region of positive resistance R andsaid region of negative resistance R, and a current minimum between saidregion of negative resistance R and said second region of positiveresistance R means for biasing said diode for bistable operation,whereby said diode adopts either a low voltage state of stableequilibrium in said first region of positive resistance R or a highvoltage state of stable equilibrium in said second region of positiveresistance R and a second branch extending between said terminals andcontaining a padding resistor whose resistive magnitude R is greaterthan that of said diode negative resistance R, thereby controlling themagnitude of the difference between said current maximum and saidcurrent minimum and regulating the magnitude of excitation current whichefiects a rapid voltage transition from either one of said regions ofpositive resistance to the other, and means for controlling the rate ofsaid rapid voltage transition, said means comprising an inductor, havingan inductance L, connected in series with said padding resistor, wherebythe natural frequencies 5 and ,8 for the portion of said transitionoccurring in said region of negative resistance and the naturalfrequencies 6' and [3 for those portions of said transition occurring insaid regions of positive resistance are given by the relations:

where C is the magnitude of the diode capacitance, R is R in said firstregion of positive resistance, R is R in said second region of positiveresistance and other symbols are as defined above.

15. Apparatus as defined in claim 14 wherein said inductor is ofmagnitude dependent upon a prescribed time constant of said networkoperating in its negative resistance condition substantially accordingto the relation:

where 1 =tirne constant of a rising exponential wave during switchingthrough said negative resistance condition.

16. Apparatus as defined in claim 14 wherein said inductor is ofmagnitude dependent upon a prescribed time constant of said networkoperating in its positive resistance condition substantially accordingto the relation:

where T =time constant of a rising exponential wave during switchingthrough said positive resistance condition, and a" ,B'.

17. Apparatus as defined in claim 14 wherein said inductor is ofmagnitude dependent upon a prescribed time constant of said networkoperating in its positive resistance condition substantially accordingto the relation:

where 1 =time constant of a rising exponential wave during switchingthrough said positive resistance condition,

ase

and other symbols are as for claim 4.

18. An integral high frequency building block for performing logicfunctions comprising a crystal diode mounted between first and seconddistinct terminal holders, said holders being closely spaced from eachother by a dielectric film thereby to assure a minimal inductance of thedistributed parameter type between said diode and the outer peripheriesof said holders in the surfaces of said film, a dielectric body spanningthe spacing between said holders and in touching contact therewith onlyat said peripheries said body being an extrusion of said film betweensaid holders, inductive and resistive means on the surface of said bodycomprising a coating of the distributed parameter type wherebycontrolled amounts of inductance and resistance are effectivelyconnected in series across said terminals of said building block, saidcontrolled amount of inductance being significantly greater than saidminimal inductance.

19. A high speed switching unit which comprises a crystalline waferhaving a negative resistance of the voltage-controlled type, twomounting plates disposed in substantially parallel arrangement and incontact, respectively, with opposite faces of said wafer, a body ofsolid low-loss dielectric material surrounding said wafer, substantiallyfilling the remaining space between said plates, and extending beyondthe peripheries of said plates, the configuration of the surface of saidbody being that swept out by the rotation, through a full revolutionabout an axis perpendicular to the opposite faces of said wafer, of akey-hole shaped figure lying in a plane including said perpendicularaxis, and a film of conductive material of preassigned resistivityoverlying the entire surface of said body that is not included betweensaid plates and in electrical contact, at its edges, with theperipheries of said plates, whereby said body, with its resistive film,manifests the properties of distributed resistance and inductance,connected to said plates and in parallel with said wafer.

20. A switching network which comprises two like, similarly poled,bistable circuits connected in series between a first terminal and asecond terminal, each of said circuits comprising two parallel branches,the first branch of each circuit containing only a crystal diode, thesecond branch of each circuit containing only an inductor and a paddingresistor, connected in series, each of said diodes having acurrent-voltage characteristic of the voltagecontrolled type, having acurrent maximum for a lower voltage V a current minimum for a highervoltage V a negative resistance branch joining said maximum to saidminimum, a first positive resistance branch for voltages less than saidlower voltage and a second positive resistance branch for voltages abovesaid higher voltage, means for applying across said first and secondterminals a bias voltage V of a magnitude substantially equal to wherebyone of said diodes adopts a first stable state in which its voltage isless than V and the other diode adopts a second stable state in whichits voltage is greater than V the currents flowing through saidseries-connected circuits being alike, each of said resistors beingproportioned to reduce the slope of the negative resistance branch ofthe current-voltage characteristic of its shunt-connected diode to apreassigned low value, connections for applying a voltage pulse to saidfirst and second terminals of a polarity and magnitude to initiate ashift of one of said diodes from the state it occupies toward the stateoccupied by the other diode, each of said inductors being proportionedto impede abrupt changes of the current through its series-connectedresistor, whereby a shift of the state of said last-named one diode tothe state of the other diode is accompanied by an opposite shift of thestate of said other diode to the state occupied by said one diode.

21. A microwave bistable switching circuit comprising a cylindricalouter conductor, a short-circuit termination at one end thereof, theseries combination of two integral high frequency building blocks asdefined in claim 18 mounted coaxially with said outer conductor betweensaid short-circuit termination and a coaxial inner conductor, aresistive disk interposed between said inner and outer conductors, afeeder coaxial line joining said cylindrical outer conductor at a rightangle thereto and having its inner conductor in contact with said diskwhereby a voltage source across said feeder line causes a biasingcurrent to circulate through said series combination of building blocksthus placing one of said blocks in its high voltage state and the otherin its low voltage state, a dielectric disk between the conductors ofsaid feeder line and presenting at high frequencies a by-passcapacitance across said voltage source, a unidirectional source ofcurrent pulses between said inner and outer conductors, a taperedsection of coaxial line between said source of pulses and said diskproviding matching means to compensate for discontinuities occasioned bythe presence of said disk, and means for utilizing the rapid voltagetransition from one state to another affected by the application of saidcurrent pulses, said means comprising a coaxial line joining saidcylindrical outer conductor at a right angle thereto and having itsinner conductor abutting said series combination of building blocksbetween the toroidal surfaces thereon.

References Cited in the file of this patent UNITED STATES PATENTS2,614,140 Kreer Oct. 14, 1952 2,772,360 Shockley Nov. 27, 1956 2,899,646Read Aug. 11, 1959 2,986,724 Jaeger May 30, 1961

